It is possible to add a latch-off fault response to a power converter with a simple set/reset (SR) latch circuit. Figure 2 shows an SR latch and its truth table. For this example, the SR latch has ...

Figure 2 Example simulation with both inputs = 1. A NAND gate can of course be realized by adding M2 and R3 to form an output inverter. Figure 3 Two-input NAND gate (a), and MOSFET realization (b) For ...

The next step was to build a S-R latch using the NAND gates and inverters, which holds some basic memory. From there, with some size reductions, a Master-Slave J-K Flip Flop, similarly using NAND ...