This paper proposes a “quasi-synchronous” design approach for signal processing circuits, in which timing violations are permitted, but without the need for a hardware compensation mechanism. The case ...

This paper presents an in-depth case study on dataflow-based analysis and exploitation of parallelism in the design and implementation of a MPEG reconfigurable video coding decoder. Dataflow ...

An application to design, develop and operate prototypical model railway signalling systems. Can be used with the Pi-SPROG command station for full DCC control of points, signals and other DCC ...