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IEEE2d
Low power CMOS NAND gate using DVS and mutithreshold CMOS technique
In digital and analog circuits, power consumption plays an important role in CMOS device. Due to scale down technology in VLSI circuits the threshold voltage of transistors reduced but increases in ...
IEEE5d
A 56-mW 23-mm/sup 2/ single-chip 180-nm CMOS GPS receiver with 27.2-mW 4.1-mm/sup 2/ radio - IEEE Xplore
A 56-mW 23-mm/sup 2/ GPS receiver with CPU-DSP-64 kRAM-256 kROM and a 27.2-mW 4.1-mm/sup 2/ radio has been integrated in a 180-nm CMOS process. The SoC GPS receiver, connected to an active antenna, ...