We propose a time-domain architecture for an LC-VCO-based ADC that employs a tapped-delay line (TDL) as a phase quantizer (PQ). This architecture includes a feedback loop designed to stabilize phase ...

The SRAM-interface High-speed DRAM (SH-RAM) is an embedded DRAM that can replace almost all embedded SRAMs in SoC fabricated by a 65-nm LSTP embedded DRAM process. This paper describes the SH-RAM ...