Figure 1 shows a generic example of a block diagram with the i/o requirements listed. The software architecture ... a microcontroller. How heavy or how light the processing requirements will determine ...

The new Single-Wire On-chip Rapid Debugging (SWORD™) interface for the R8051XC2™ microcontroller core ... (EASE™) CAST offers for the 8051 cores. The innovative software debugging package uses a ...

Sourced from 8051 experts Silesia Devices, the new S80251XC3 Microcontroller Core uses a Harvard architecture with separate instruction and data buses, branch prediction, branch target caches, and ...

The MCS 151 and 251 cores are binary-code-compatible with the 8051. (The 251 has additional instructions.) The 151 maintains the 80C51 accumulator-based core compatibility, and the 251 is a ...