For example ... the latch circuit to be reset-dominant. In other words, when both the set and reset inputs are low, the reset input will dominate, resulting in the Q output being low. Figure 4 shows a ...

Figure 2 Example simulation with both inputs = 1 A NAND gate can of course be realized by adding M2 and R3 to form an output inverter. Figure 3 Two-input NAND gate (a), and MOSFET realization (b) For ...

The next step was to build a S-R latch using the NAND gates and inverters, which holds some basic memory. From there, with some size reductions, a Master-Slave J-K Flip Flop, similarly using NAND ...

Logic gates with Lego Dec. 27, 2006 Here is a Web site by a guy who designed working versions of all the basic logic gates, that is the NOT, OR, NOR, AND, and NAND gates, with Lego blocks.