The MI2CMS macro implements a synchronous single-chip I2C Master and Slave Macro capable of linking one CPU to one I2C-bus. Communication with I2C-bus is carried out on a byte-wise basis using ...

scalable and extensible verification intellectual property that is suitable for verification of I2C Master/ Slave. UST Global VIP for I2C provides a comprehensive set of verification, methodology and ...

covering issues found while implementing an I2C slave. As with any shared bus, whether multi-master or not, figuring out when the bus is clear is a fun topic, yet one which can cause endless ...