Researchers have discovered multiple instances of unsigned firmware in computer peripherals ... though they tested a specific device for each particular peripheral, "other models and even other ...

Another block diagram of a more official nature leaked ... Chipset Engineering Interlock " dated May 2019 Ryzen 3000 as CPU (codenamed Matisse) will have a total of 24 PCIe Gen4 lanes.

Over at the chiphell forums, a block diagram leaked of the AMD X570 Chipset ... Since graphics PCIe lanes are always tied towards the CPU, that means a Ryzen 3000 proc can manage x16 Gen 4.0 ...